Construction of a reconfigurable dynamic logic cell

Pramana - Journal of Physics

Volumn 64, Issue 3 SPEC. ISS., 2005, Pages 433-441

  Murali, K ^a   Sinha, Sudeshna ^b   Ditto, William L ^c  

^a ANNA UNIVERSITY   (India)

^b INSTITUTE OF MATHEMATICAL SCIENCES   (India)

^c J Crayton Pruitt Family Department of Biomedical Engineering   (United States)

Author keywords

Computer architecture; Logic gates; Nonlinear circuits

Indexed keywords

CHAOS THEORY; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; COMPUTER NETWORKS; MICROPROCESSOR CHIPS; PROGRAM PROCESSORS; QUANTUM ELECTRONICS;

ARITHMETIC TASKS; CHAOTIC CIRCUIT; HALF-ADDER IMPLEMENTATIONS; NONLINEAR CIRCUITS;

LOGIC GATES;

EID: 15744396078     PISSN: 03044289     EISSN: None     Source Type: Journal    
DOI: 10.1007/bf02704569     Document Type: Conference Paper

References (13)

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