Architecture and design of an 8-bit FLUX-1 superconductor RSFQ microprocessor

International Journal of High Speed Electronics and Systems

Volumn 12, Issue 2, 2002, Pages 521-529

  Dorojevets, Mikhail ^a  

^a USA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ATTENUATION; COMPUTER AIDED DESIGN; COMPUTER ARCHITECTURE; ELECTRIC LINES; FORMAL LOGIC; JOSEPHSON JUNCTION DEVICES; QUANTUM THEORY; SOFTWARE PROTOTYPING;

CHIP DESIGN; RAPID SINGLE FLUX QUANTUM (RSFQ) LOGIC;

MICROPROCESSOR CHIPS;

EID: 1542579164     PISSN: 01291564     EISSN: None     Source Type: Journal    
DOI: 10.1142/S0129156402001435     Document Type: Conference Paper

References (16)

1. K. K. Likharev, and V. K. Semenov, "RSFQ logic/memory family: A new Josephson-junction digital technology for sub-terahertz-clock-frequency digital systems," IEEE Trans. Appl. Supercond. 1, 3 (1991).
2. W. Chen, A.V. Rylyakov, V. Patel, and K. K. Likharev, "Rapid single-flux quantum T-flip-flop operating at 770 GHz," IEEE Trans. Appl. Supercond. 9, 3212 (1999).
3. S. V. Polonsky, V. K. Semenov, and P. N. Shevchenko, "PSCAN - personal superconductor circuit analyzer," Supercond. Sci. Techol. 4, 667 (1991).
4. S. Polonsky, P. Shevchenko, A. Kirichenko, et al., "PSCAN'96: new software for simulation and optimization of complex RSFQ circuits," IEEE Trans. Appl. Supercond. 7, 2685 (1997).
5. P. I. Bunyk, and S. V. Rylov, "Automated calculation of mutual inductance matrices of multilayer superconductor integrated circuits," Abstracts of Int. Supercond. Electronics Conf., NIST, Boulder, CO (1993).
6. K. Gai, Q.P. Herr, V. Adler, et al., "Tools for the computer-aided design of multigigahertz superconducting digital circuits," IEEE Trans. Appl. Supercond. 9, 18 (1999).
7. 2 Nb Integrated Circuit process," IEEE Trans. Appl. Supercond. 9, 1061 (2001).
8. M. Dorojevets, P. Bunyk, D. Zinoviev, and K. Likharev, "Superconductor electronic devices for petaflops computing," FED Journal 10, 3 (1999).
9. M. Dorojevets, "COOL Multithreading in HTMT SPELL-1 Processors," Int. Journal on High Speed Electronics and Systems 1, 247 (2000).
10. M. Dorojevets, P. Bunyk, and D. Zinoviev, "FLUX Chip: Design of a 20-GHz 16-bit Ultrapipelined RSFQ Processor Prototype Based on 1.75-um LTS Technology," IEEE Trans. Appl. Supercond. 9, 326 (2001).
11. M. Dorojevets, and P. Bunyk, "FLUX-1: The First Superconductor 20-GHz 8-bit RSFQ Microprocessor Built in 1.75-μm Nb-trilayer Technology," Abstracts of Int. Workshop on Future Trends in Microelectronics: The Nano Millennium, Ile de Bendor, France, 40 (2001).
12. Y. Naveh, D. Averin, and K. Likharev, "Physics of high-jc Josephson junctions and prospects of their RSFQ VLSI applications," IEEE Trans. Appl. Supercond. 9, 1056 (2001).
13. P. Bunyk, P.-M. Koenig, and D. Zinoviev, "Passive interconnects: a revolutionary approach to RSFQ system design," Abstracts of the 8th ISEC, Osaka, Japan, (2001).
14. P. Bunyk, K. Likharev, and D. Zinoviev, "RSFQ technology: physics and devices," Int. Journal High Speed Electronics and Systems 1, 257 (2001).
15. M-S. Wire, D.J. Durand, A.H. Silver, and M.K Wagner, "A multiple pin, flip-chip system for microwave and gigabit per second device testing at variable temperatures," Rev. Sci. Instruments 2, 1542 (2001).
16. D. Zinoviev, and Yu. Polyakov, "Octopux: an advanced automated setup for testing superconductor circuits," IEEE Trans. Appl. Supercond. 7, 3240 (1997).