A low-power design methodology for high-resolution pipelined analog-to-digital converters

Proceedings of the International Symposium on Low Power Electronics and Design

Volumn 2003-January, Issue , 2003, Pages 334-339

  Lotfi, R ^a   Taherzadeh Sani, M ^a   Azizi, M Y ^a   Shoaei, O ^a  

^a UNIVERSITY OF TEHRAN   (Iran)

Author keywords

Analog digital conversion; Capacitors; Design methodology; Design optimization; Energy consumption; Equations; Operational amplifiers; Permission; Pipeline processing; Static power converters

Indexed keywords

ALGORITHMS; ANALOG INTEGRATED CIRCUITS; CAPACITORS; DESIGN; ELECTRIC POWER SUPPLIES TO APPARATUS; ELECTRIC POWER UTILIZATION; ENERGY UTILIZATION; LOW POWER ELECTRONICS; OPERATIONAL AMPLIFIERS; OPTIMIZATION; POWER CONVERTERS; POWER ELECTRONICS;

DESIGN METHODOLOGY; DESIGN OPTIMIZATION; EQUATIONS; PERMISSION; PIPELINE PROCESSING; STATIC POWER CONVERTERS;

ANALOG TO DIGITAL CONVERSION;

EID: 1542269324     PISSN: 15334678     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/LPE.2003.1231890     Document Type: Conference Paper

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