On design and implementation of a decimation filter for multistandard wireless transceivers

IEEE Transactions on Wireless Communications

Volumn 1, Issue 4, 2002, Pages 558-562

  Ghazel, Adel ^a,b   Naviner, Lirida ^a,c   Grati, Khaled ^a,b  

^a IEEE   (Tunisia)

^b UNIVERSITY OF CARTHAGE   (Tunisia)

^c TELECOM PARISTECH   (France)

Author keywords

Decimation filtering; Hardware implementation; Sigma delta conversion; Wireless communications

Indexed keywords

DECIMATION FILTERS; HARDWARE IMPLEMENTATION; SIGMA-DELTA CONVERSION;

BROADBAND NETWORKS; DIGITAL RADIO; FIELD PROGRAMMABLE GATE ARRAYS; GLOBAL SYSTEM FOR MOBILE COMMUNICATIONS; MODULATORS; SIGNAL FILTERING AND PREDICTION;

TRANSCEIVERS;

EID: 14844301089     PISSN: 15361276     EISSN: None     Source Type: Journal    
DOI: 10.1109/TWC.2002.805093     Document Type: Article

References (28)

1. DECT Standard Document ETSI ETS 300 175-1 Ed.2 (1996-09).
2. ETSI, "Radio Transmission and Reception," GSM 05.05, 1996.
3. "UMTS: Universal mobile telecommunications system; user equipment radio transmission and reception (FDD)-3G Tech. Spec.,"ETSI, 125101 v3.2.0 (2000-03), 2000.
4. J. Crols and M. Steyaert, "A single-chip 900 MHz CMOS receiver front-end with a high performance low-IF topology," IEEE J. Solid-State Circuits, pp. 1483-1492, Dec. 1995.
5. J. Rudell et al., "A 1.9 GHz wideband IF double conversion CMOS integrated receiver for cordless telephone applications," in Int. Solid-State Circuits Conf., vol. 8, June 2000, pp. 2071-2088.
6. J. C. Candy, "Decimation for sigma-delta modulation," IEEE Trans. Commun., vol. COM-34, pp. 72-76, Jan. 1986.
7. B.-A. White and M. I. Elmasry, "Low-power design of decimation filters for a digital IF receiver," IEEE Trans. VLSI Syst., vol. 8, pp. 339-345, June 2000.
8. Y. Gao, L. Jia, and H. Tejhumen, "A fifth-order comb decimation filter for multistandard transceiver applications," presented at the IEEE Int. Symp. Circuits and Systems, Geneva, Switzerland, May 2000.
9. P. C. Maulik, M. S. Chadha, W. L. Lee, and P. J. Crawley, "A 16-bit 250 kHz delta-sigma modulator and decimation filter," IEEE J. Solid-State Circuits, vol. 35, pp. 458-467, Apr. 2000.
10. D. Seo, N.-R. Shanbhag, and M. Feng, "Low-power decimation filters for over-sampling ADCs via the decorrelating (DECOR) transform," presented at the IEEE Int. Symp. Circuits Systems, Geneva, Switzerland, May 2000.
11. K. Grati, A. Ghazel, L. Naviner, and S. Tabbane, "Comparison of FIR and IIR structures for decimation filtering in radio communications," presented at the 5th Multi-Conf. Systemics, Cyb. and Informatics, Orlando, FL, July 2001.
12. T. Stetzler et al., "A 2.7 V to 4.5 V single-chip GSM transceiver RF integrated circuit," presented at the IEEE Int. Solid-State Circuits Conf.-Dig. Tech. Papers, San Francisco, CA, 1995.
13. K. Irie et al., "A 2.7 V GSM RF transceiver IC," presented at the IEEE Int. Solids-State Circuits Conf., San Francisco, CA, Feb. 1997.
14. L. Der and B. Razavi, "A 2 GHz CMOS image-reject receiver with sign-sign LMS calibration," presented at the IEEE Int. Solid-State Circuits Conf., San Francisco, CA, 2001.
15. S. Hisayasu et al., "A 1.9 GHz single-chip if transceiver for digital cordless phones," presented at the Int. Solid-State Circuits Conf.-Dig. Tech. Papers, San Francisco, CA, 1996.
16. J. Sevenhans et al., "An integrated Si bipolar RF transceiver for a zero IF 900 MHz GSM digital mobile radio front end of a hand portable phone," in Proc. 5th Annu. IEEE Int. ASIC Conf. Exhibit, 1992, pp. 561-564.
17. C. Hull, J. L. Thain, and R. R. Chu, "A direct-conversion receiver for 900 MHz (ISM band) spread-sectrum digital cordless telephone," in Proc. IEEE Int. Solid-State Circuits Conf., Dec. 1996, pp. 1955-1963.
18. M. Masegawa, T. Fukagawa, M. Mimura, and M. Makimoto, "Homodyne receiver technology for small and low-power consumption mobile communications equipment," presented at the Int. Symp. Signals, Systems Electronics, San Francisco, CA, 1995.
19. A. Abidi, A. Rofougaran, G. Chang, J. Rael, J. Chang, M. Rofougaran, and P. Chang, "The future of CMOS wireless transceivers," in Proc. IEEE Int. Solid-State Circuits Conf., Feb. 1997, pp. 118-119.
20. H. Khorramabadi, M. J. Tarsia, and N. S. Woo, "Baseband filters for IS-95 CDMA receiver aplications featuring digital automatic frequency tuning," in Proc. IEEE Int. Solid-State Circuits Conf., Feb. 1996, pp. 172-173.
21. T. Cho et al., "A power-optimized CMOS baseband channel filter and ADC for cordless applications," in Proc. Symp. VLSI Circuits, Jan. 1996, pp. 64-65.
22. A. Feldman, High-Speed, Low-Power Sigma-Delta Modulators for RF Baseband Channel Applications. Berkeley, CA: Univ. California, 1997.
23. S. R. Norsworthy and R. E. Crochiere, "Decimation and interpolation for sigma delta conversion," in Delta Sigma Data Converters. Piscataway, NJ: IEEE Press, 1997.
24. L. Naviner and P. Loumeau, "A method to specify sigma delta converters in radio receivers," presented at the IEEE 8th Int. Conf. MIXDES'2001, Zakopane, Pologne, 2001.
25. R. E. Crochiere and L. R. Rabiner, Multirate Digital Signal Processing. Englewood Cliffs, NJ: Prentice-Hall, 1983.
26. S. Chu and C. S. Burrus, "Multirate filter design using Comb filters," IEEE Trans. Circuits Systems, vol. CAS-31, pp. 913-924, Nov. 1984.
27. K. Grati, A. Ghazel, L. Naviner, and F. Moatamri, "Design and Implementation of Decimation Filter Cascade for Radio Communications," presented at the 8th IEEE Int. Conf. Electronics Circuits Systems, Malta, Sept. 2001.
28. A. Ghazel, L. Naviner, and F. Moatamri, "FPGA-based architecture of decimation filter for multistandard wireless transceiver," presented at the Smart Systems Devices Conf., Hammamet, Tunisia, Mar. 2001.