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Volumn 38, Issue 5, 2003, Pages 49-62

Compile-time dynamic voltage scaling settings: Opportunities and limits

Author keywords

Analytical model; Compiler; Dynamic voltage scaling; Low power; Mixed integer linear programming

Indexed keywords

COMPUTER SIMULATION; ELECTRIC POWER SUPPLIES TO APPARATUS; EMBEDDED SYSTEMS; ENERGY CONSERVATION; INTEGER PROGRAMMING; LINEAR PROGRAMMING; REAL TIME SYSTEMS;

EID: 1442313460     PISSN: 03621340     EISSN: None     Source Type: Journal    
DOI: 10.1145/780822.781138     Document Type: Conference Paper
Times cited : (38)

References (28)
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    • Power-profile driven variable voltage scaling for heterogeneous distributed real-time embedded systems
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    • Luo, J.1    Jha, N.K.2
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    • Intra-task voltage scheduling for low-energy hard real-time applications
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    • Shin, D.1    Kim, J.2    Lee, S.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.