Run-time power estimation in high performance microprocessors

Proceedings of the International Symposium on Low Power Electronics and Design, Digest of Technical Papers

Volumn , Issue , 2001, Pages 135-140

  Joseph, R ^a   Martonosi, M ^a  

^a Princeton University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; COMPUTER OPERATING SYSTEMS; COMPUTER SIMULATION; COMPUTER SOFTWARE; ENERGY DISSIPATION; ENERGY UTILIZATION; GRAPH THEORY; PROGRAM COMPILERS; SIGNAL THEORY;

HIGH PERFORMANCE MICROPROCESSORS;

MICROPROCESSOR CHIPS;

EID: 0034863954     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/383082.383119     Document Type: Conference Paper

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