Considerations for phase accumulator design for direct digital frequency synthesizers

Proceedings of 2003 International Conference on Neural Networks and Signal Processing, ICNNSP'03

Volumn 1, Issue , 2003, Pages 176-179

  Betowski, David J ^a   Beiu, Valeria ^a  

^a Washington State University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DESIGN STEPS; DIRECT DIGITAL FREQUENCY SYNTHESIZER; FAST SWITCHING FREQUENCY; HIGH RESOLUTION; HIGH SPEED; LOW POWER; OPTIMAL NUMBER; PHASE ACCUMULATORS; POWER CONSTRAINTS;

COMMUNICATION SYSTEMS; COMPUTER SIMULATION; DIGITAL TO ANALOG CONVERSION; FREQUENCY SYNTHESIZERS; MATHEMATICAL MODELS; OPTIMIZATION; SIGNAL PROCESSING;

NEURAL NETWORKS;

EID: 12744262319     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICNNSP.2003.1279240     Document Type: Conference Paper

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