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Volumn , Issue , 1998, Pages 335-342
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Design considerations for Gigabit Ethernet 1000base-T twisted pair transceivers
a a a a a a a a a a a a a |
Author keywords
[No Author keywords available]
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Indexed keywords
CMOS INTEGRATED CIRCUITS;
COMPUTER SIMULATION;
DIGITAL INTEGRATED CIRCUITS;
DIGITAL SIGNAL PROCESSING;
LINEAR INTEGRATED CIRCUITS;
LOCAL AREA NETWORKS;
TRANSCEIVERS;
ETHERNET;
INTEGRATED CIRCUIT LAYOUT;
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EID: 0031641607
PISSN: 08865930
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (58)
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References (8)
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