Improving workload balance and code optimization on processor-in-memory systems

Journal of Systems and Software

Volumn 71, Issue 1-2, 2004, Pages 71-82

  Chu, Slo Li ^a   Huang, Tsung Chuan ^a   Lee, Lan Chi ^a  

^a NATIONAL SUN YAT SEN UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CODES (SYMBOLS); COMPUTER ARCHITECTURE; INTELLIGENT AGENTS; OPTIMIZATION; PROGRAM COMPILERS; RANDOM ACCESS STORAGE;

PROCESSOR-IN-MEMORY (PIM) ARCHITECTURE; SCALAR CODES; VECTOR CODES;

PARALLEL PROCESSING SYSTEMS;

EID: 1242320320     PISSN: 01641212     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0164-1212(02)00150-4     Document Type: Article

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