The design and multiplier-less realization of software radio receivers with reduced system delay

IEEE Transactions on Circuits and Systems I: Regular Papers

Volumn 51, Issue 12, 2004, Pages 2444-2459

  Yeung, K S ^a   Chan, S C ^a  

^a UNIVERSITY OF HONG KONG   (Hong Kong)

Author keywords

Design and multiplier less realization; Low delay; Passband linear phase finite impulse response (FIR) and allpass filters; Sampling rate conversion; Semidefinite programming (SDP); Software radio receiver (SRR); Variable digital filters (VDF)

Indexed keywords

ANALOG TO DIGITAL CONVERSION; DELAY CIRCUITS; DESIGN; DIGITAL FILTERS; DIGITAL SIGNAL PROCESSING; EIGENVALUES AND EIGENFUNCTIONS; FIR FILTERS; MATRIX ALGEBRA; OPTIMIZATION; TRANSFER FUNCTIONS;

ALLPASS FILTERS; LINEAR MATRIX INEQUALITIES; REDUCED SYSTEM DELAY; SEMIDEFINITE PROGRAMMING (SDP); SOFTWARE RADIO RECEIVER (SRR); VARIABLE DIGITAL FILTERS (VDF);

RADIO RECEIVERS;

EID: 10944262673     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2004.838253     Document Type: Article

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