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Volumn 13, Issue 4, 2003, Pages 225-237

FPGA implementation of a pyramidal weightless neural networks learning system

Author keywords

FPGA; Neural network hardware implementation; On chip learning; PLN; Weightless neural networks

Indexed keywords


EID: 10844257763     PISSN: 01290657     EISSN: None     Source Type: Journal    
DOI: 10.1142/S012906570300156X     Document Type: Article
Times cited : (7)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.