Hardware implementation of RAM neural networks

Pattern Recognition Letters

Volumn 17, Issue 4 SPEC. ISS., 1996, Pages 421-429

  Do Valle Simões, Eduardo ^a   Uebel, Luís Felipe ^a   Barone, Dante Augusto Couto ^a  

^a FEDERAL UNIVERSITY OF RIO GRANDE DO SUL   (Brazil)

Author keywords

Boolean neural networks; Character recognition; Fast prototyping; Image classification; Neural network hardware implementation

Indexed keywords

BOOLEAN FUNCTIONS; C (PROGRAMMING LANGUAGE); CHARACTER RECOGNITION; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; COMPUTER HARDWARE DESCRIPTION LANGUAGES; COMPUTER SIMULATION; COMPUTER SOFTWARE; IMAGE ANALYSIS; LOGIC GATES;

BOOLEAN NEURAL NETWORKS; FAST PROTOTYPING PACKAGE; IMAGE CLASSIFICATION; NETWORK LOGIC MINIMIZATION;

NEURAL NETWORKS;

EID: 0030568488     PISSN: 01678655     EISSN: None     Source Type: Journal    
DOI: 10.1016/0167-8655(95)00137-9     Document Type: Article

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