A compiler framework for recovery code generation in general speculative optimizations

Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT

Volumn , Issue , 2004, Pages 17-28

  Lin, Jin ^a   Hsu, Wei Chung ^a   Yew, Pen Chung ^a   Ju, Roy Dz Ching ^b   Ngai, Tin Fook ^b  

^a UNIVERSITY OF MINNESOTA   (United States)

^b INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CODE GENERATION; COMPILER OPTIMIZATION; MULTI-LEVEL POINTERS; OPEN RESEARCH COMPILER (ORC);

ALGORITHMS; CODES (SYMBOLS); MATHEMATICAL MODELS; OPTIMIZATION; SUSTAINABLE DEVELOPMENT;

PROGRAM COMPILERS;

EID: 10444279946     PISSN: 1089795X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (22)

1. J. Bharadwaj, K. Menezes, and C. McKinsey. Wavefront scheduling: Path based data representation and scheduling of subgraphs, MICRO'32, December, 1999.
2. R.A. Bringmann, S.A. Mahlke, R. E. Hank, J.C. Gyllenhaal, and W.W. Hwu, Speculative Execution Exception Recovery Using Write-Back Suppression, MICRO'26, Dec 1993.
3. T. Chen, J. Lin, W. Hsu, P.C. Yew. An Empirical Study on the Granularity of Pointer Analysis in C Programs, In 15th Workshop on Languages and Compilers for Parallel Computing, Maryland, July 2002.
4. F. Chow, S. Chan, S. Liu, R. Lo, and M. Streich. Effective representation of aliases and indirect memory operations in SSA form. In Proc. of the Sixth Int'l Conf. on Compiler Construction, April 1996.
5. F. Chow, S. Chan, R. Kennedy, S. Liu, R. Lo, and P. Tu. A new algorithm for partial redundancy elimination based on SSA form. PLDI'97, pages 273-286, Las Vegas, Nevada, May 1997.
6. R. Cytron, et. al., Efficiently computing static single assignment form and the control dependence graph. ACM Transactions on Programming Languages and Systems, 13(4): 451-490, 1991.
7. C. Dulong. The IA-64 Architecture at Work, IEEE Computer, Vol. 31, No. 7, pages 24-32, July 1998.
8. K. Ishizaki, T. Inagaki, H. Komatsu, T. Nakatani, Eliminating Exception Constraints of Java Programs for IA-64, PACT'2002, pp. 259-268, September, 2002.
9. R. D.-C. Ju, K. Nomura, U. Mahadevan, and L.-C. Wu. A Unified Compiler Framework for Control and Data Speculation, PACT'2000, pages 157-168, Oct. 2000.
10. R. D.-C. Ju, S. Chan, and C. Wu. Open Research Compiler (ORC) for the Itanium Processor Family. Tutorial presented at Micro 34, 2001.
11. R. D.-C. Ju, S. Chan, F. Chow, and X. Feng. Open Research Compiler (ORC): Beyond Version 1.0, Tutorial presented at PACT'2002.
12. M. Kawahito, H. Komatsu, and T. Nakatani, Effective Null Pointer Check Elimination Utilizing Hardware Trap, ASPLOS-IX, Nov. 12-15, 2000.
13. R. Kennedy, F. Chow, P. Dahl, S.-M. Liu, R. Lo, and M. Streich. Strength reduction via SSAPRE. In Proc. of the Seventh Int'l Conf. on Compiler Construction, pages 144-158, Lisbon, Portugal, Apr. 1998.
14. R.Kennedy, S. Chan, S. Liu, R. Lo, P. Tu, and F. Chow. Partial Redundancy Elimination in SSA Form. ACM Trans. on Programming Languages and systems, v.21 n.3, pages 627-676, May 1999.
15. J. Knoop, O. Ruthing, and B. Steffen. Lazy code motion.PLDI'92, pages 224-234, San Francisco, California, June 1992.
16. J. Lin, T. Chen, W.-C. Hsu, P.-C. Yew, R. D-C Ju, T-F. Ngai, S Chan, A Compiler Framework for Speculative Analysis and Optimizations, PLDI'03, June 2003.
17. J. Lin, T.Chen, W.C. Hsu, P.C. Yew, Speculative Register Promotion Using Advanced Load Address Table (ALAT), CG003, pages 125-134, San Francisco, California, March 2003
18. R. Lo, F. Chow, R. Kennedy, S. Liu, P. Tu, Register Promotion by Sparse Partial Redundancy Elimination of Loads and Stores, PLDI'98, pages 26-37, Montreal, 1998
19. S.A. Mahlke, Exploiting Instruction Level Parallelism in the Presence of Conditional Branches, Ph. D. Thesis, University of Illinois, Urbana, IL, 1996.
20. U. Mahadevan, K. Nomura, R. D.-C. Ju, and Rick Hank, Applying Data Speculation in Modulo Scheduled Loops, PACT'2000, pp. 169-176, Oct. 2000.
21. pfmon: ftp://ftp.hpl.hp.com/pub/linux-ia64/pfmon-1.1-0.ia64.rpm
22. Youfeng Wu and James R. Larus. Static branch frequency and program profile analysis.MICRO'27, pages 1-11, Nov 1994.