Applying data speculation in modulo scheduled loops

Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT

Volumn , Issue , 2000, Pages 169-176

  Mahadevan, Uma ^a   Nomura, Kevin ^a   Ju, Roy Dz ching ^a   Hank, Rick ^a  

^a HEWLETT PACKARD COMPANY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CONSTRAINT THEORY; DATA FLOW ANALYSIS; GRAPHICAL USER INTERFACES; PARALLEL PROCESSING SYSTEMS; PROGRAM COMPILERS; REQUIREMENTS ENGINEERING; RESOURCE ALLOCATION;

DATA SPECULATION; INSTRUCTION DEPENDENCE GRAPH; INSTRUCTION LEVEL PARALLELISM; MODULO SCHEDULED LOOPS; RECURRENCE CONSTRAINT; RESOURCE CONSTRAINT;

COMPUTER ARCHITECTURE;

EID: 0034505879     PISSN: 1089795X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (13)