Low-cost, wafer level underfilling and reliability testing of flip chip devices

Proceedings - Electronic Components and Technology Conference

Volumn 2, Issue , 2004, Pages 1492-1498

  Grieve, Alan ^a   Capote, M Albert ^a   Lenos, Howard A ^a   Soriano, Arsenia ^a  

^a Aguila Technologies Inc   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

FLIP CHIP ON BOARD (FCOB); HIGH ASSEMBLY YIELD; SOLDER BUMPS; UNDERFILLING;

CLEAN ROOMS; COSTS; ELECTRONICS PACKAGING; LASER ABLATION; METALLIZING; PROBLEM SOLVING; RELIABILITY; THERMAL CYCLING;

FLIP CHIP DEVICES;

EID: 10444272381     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. C.P. Wong, S. Luo, Z. Zhang, "Flip the Chip", Science, Dec 22, 2000, 290, 2269
2. C.P. Wong, S.H. Shi, G. Jefferson, "High-Performance No-Flow Underfill for Low-Cost Flip Chip Applications; Material Characterization" IEEE Transactions on Components, Packaging and Manufacturing Technology, Part A, 1998, 21 (3), 450
3. st Electronic Components and Technology Conf, Orlando, FL, May. 2001, pp. 288-292
4. Arun K. Chauduri, M.R. Walsh, F. Stepniak, S. Post, R.L.D. Zenner, M.A. Kropp, S.B. Charles, R.B. Kinney, F.B. Li, "Wafer Applied Underfill- Delivering Flip Chip to the Mainstream", Proceedings SAE 2002 World Congress, Detroit, Michigan, March 2002
5. K. Gilleo and D. Blumel, "Transforming Flip Chip into CSP with Reworkable Wafer Level Underfill" Proceedings Pan Pacific Microelectronics Symposium, Oahu, Hawaii, February 1999, pp. 159-165
6. J. Qi, P. Kulkarni, N. Yala, J. Danvir, M. Chason, R.W.Johnson, R. Zhao, L. Crane, M. Konarski, E. Yaeger, A. Torres, R. Tishkoff, P. Krug, "Assembly of Flip Chips Utilizing Wafer Applied Underfill" APEX 2002, Proceedings of the Technical Conference, January 2002, S-18-3-1