A fault injection tool for SRAM-based FPGAs

Proceedings - 9th IEEE International On-Line Testing Symposium, IOLTS 2003

Volumn , Issue , 2003, Pages 129-133

  Alderighi, M ^a   D'Angelo, S ^a   Mancini, M ^a   Sechi, G R ^a  

^a CNR   (Italy)

Author keywords

Circuit faults; Circuit simulation; Embedded software; Emulation; Field programmable gate arrays; Hardware; Single event upset; Software tools; Space technology; Testing

Indexed keywords

CIRCUIT SIMULATION; COMPUTER AIDED SOFTWARE ENGINEERING; COMPUTER HARDWARE; COMPUTER SOFTWARE; EMBEDDED SOFTWARE; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); RADIATION HARDENING; TESTING;

CIRCUIT FAULTS; COMMERCIAL SOFTWARE; CONFIGURATION BITSTREAM; DESIGN DEVELOPMENT; DEVICE CONFIGURATIONS; EMULATION; SINGLE EVENT UPSETS; SPACE TECHNOLOGIES;

SOFTWARE TESTING;

EID: 10444270320     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/OLT.2003.1214379     Document Type: Conference Paper

References (7)

1. Clark, J.A, Pradhan, K. "Fault Injection - A Method for Validating Computer System Dependability", IEEE Computer, vol. 28, n. 6, June 1995, pp. 47-56.
2. Yount, C.R., Siewiorek, D.P. "A Methodology for the Rapid Injection of Transient Hardware Errors", IEEE Trans. on Comp., vol.45, n. 8, August, 1996, pp. 881-891.
3. Antoni, L., Leveugle, R., Fehér, B., "Using Run-Time Reconfiguration for Fault Injection in Hardware Prototypes", Proc. of the 2002 Int'l Symposium on Defect and Fault Tolerance in VLSI Systems, [Vancouver, November 6-8, 2002], pp. 245-253.
4. Leveugle, R., Hadjiat, K. "Multi-level Fault Injection Experiments Based on VHDL Description: a Case Study", Proc. of the 2002 IEEE Int'l On-Line Testing Workshop, [Bendor, July 8-10, 2002], pp. 107-111.
5. Rebaudengo, M., Sonza Reorda, M., Violante, M. "Analysis of SEU effects in a pipelined processor", Proc. of the 2002 IEEE Int'l On-Line Testing Workshop, [Bendor, July 8-10, 2002], pp. 112-116.
6. Antoni, L., Leveugle, R., Fehér, B. "Using Run-Time Reconfiguration for Fault Injection in Hardware Prototypes", Proc. of the 2000 Int'l Symposium on Defect and Fault Tolerance in VLSI Systems, [Monte Yamanashi, October 25-27, 2000], pp. 405-413.
7. Xilinx, Foundation Series, Quick Start Guide 3.3, 2000, USA.