Vertical SiGe-base bipolar transistors on CMOS-compatible SOI substrate

Proceedings of the IEEE Bipolar/BiCMOS Circuits and Technology Meeting

Volumn , Issue , 2003, Pages 215-218

  Cai, Jin ^a   Kumar, Mahender ^b   Steigerwalt, Michael ^b   Ho, Herbert ^b   Schonenberg, Kathryn ^b   Stein, Kenneth ^b   Chen, Huajie ^b   Jenkins, Keith ^a   Ouyang, Qiqing ^a   Oldiges, Philip ^b   Ning, Tak ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

^b IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; BIPOLAR TRANSISTORS; CAPACITANCE; CMOS INTEGRATED CIRCUITS; ELECTRIC BREAKDOWN; MASKS; OSCILLATORS (ELECTRONIC); SEMICONDUCTING SILICON COMPOUNDS; SEMICONDUCTOR DEVICE STRUCTURES; SEMICONDUCTOR DOPING;

EMITTER WIDTH; LOW-TEMPERATURE-EPITAXY PROCESS; RING OSCILLATOR; SUBSTRATE-EMITTER BIAS;

SILICON ON INSULATOR TECHNOLOGY;

EID: 1042289139     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)

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2. MAX 6.7-ps-ECL SOI/HRS self-aligned SEG SiGe HBT/CMOS technology for microwave and high-speed digital applications,' IEEE Tran. ED, 49(2), p. 271, 2002.
3. J. Cai et al., 'Fully-depleted-collector polysilicon-emitter SiGe-base vertical bipolar transistor on SOI,' Symp. VLSI Tech. Digest, p.172, 2002.
4. Q. Ouyang et al., 'A simulation study on thin SOI bipolar transistors with fully or partially depleted collector,' IEEE-BCTM Tech. Digest, p.28, 2002.
5. P. Smeys et al., 'A high-performance 0.13μm SOI CMOS Technology with Cu interconnects and low-k BEOL dielectrics,' Symp. VLSI Tech. Digest, p.184, 2000.
6. T SiGe HBT BiCMOS, ASIC-compatible, copper interconnect technology for RF and microwave applications,' IEDM Tech. Digest, p.569, 1999.
7. D. Pehlke and D. Pavlidis, 'Evaluation of the factors determining HBT high-frequency performance by direct analysis of S-parameter data,' IEEE Tran. Microwave Theory and Tech., 40(12), p.2367, 1992.