Reconfigurable computing for shape-adaptive video processing

IEE Proceedings: Computers and Digital Techniques

Volumn 151, Issue 5, 2004, Pages 313-320

  Gause, J ^a   Cheung, P Y K ^b   Luk, W ^b  

^a Panasonic System LSI Design Europe   (United Kingdom)

^b IMPERIAL COLLEGE LONDON   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COSINE TRANSFORMS; DIGITAL CIRCUITS; MATHEMATICAL MODELS; MULTIMEDIA SYSTEMS; VIDEO SIGNAL PROCESSING;

ARBITRARILY SHAPED OBJECTS; RECONFIGURABLE COMPUTING; SHAPE ADAPTIVE VIDEO PROCESSING;

COMPUTER CIRCUITS;

EID: 10044286128     PISSN: 13502387     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1049/ip-cdt:20040530     Document Type: Article

References (18)

1. Villasenor, J., and Hutchings, B.: 'The flexibility of configurable computing', IEEE Signal Process. Mag., 1998, pp. 67-84
2. Wirthlin, M., and Hutchings, B.: 'Improving functional density through run-time reconfiguration', IEEE Trans. VLSI Syst., 1998, 6, (2), pp. 247-256
3. 'Overview of the MPEG-4 standard', MPEG Group: ISO/IEC JTC1/SC29/WG11 N4030, 2001
4. 'Overview of the MPEG-7 standard', MPEG Group: ISO/IEC JTC1/SC29/WG11 N4031, 2001
5. Pirsch, P., Reuter, C., Wittenburg, J.P., Kulaczewski, M.B., and Stolberg, H.-J.: 'Architecture concepts for multimedia signal processing', J. VLSI Signal Process., 2001, 29, (3), pp. 157-165
6. 'MPEG-4 video verification model version 18.0', MPEG Group: ISO/IEC JTCI/SC29/WG11 N3908, 2001
7. Wirthlin, M., and Hutchings, B.: 'Improving functional density through run-time constant propagation'. Proc. ACM 5th Int. Symp. on FPGA, 1997, pp. 86-92
8. Trimberger, S., Carberry, D., Johnson, A., and Wong J.: 'A time-multiplexed FPGA'. Proc. IEEE Workshop on FPGAs for Custom Computing Machines, 1997, pp. 22-28
9. Bellows, P., and Hutchings, B.: 'JHDL-an HDL for reconfigurable systems'. Proc. IEEE Symp. on FPGAs for Custom Computing Machines, 1998, pp. 175-184
10. Guccione, S., Levi, D., and Pundararajan, P.: 'JBits: Java-based interface for reconfigurable computing'. Proc. Conf. on Military and Aerospace Application of Programmable Devices and Technology, 1999
11. Luk, W., and McKeever, S.W.: 'Pebble: a language for parameterised and reconfigurable hardware design', Lect. Notes Compt. Sci., 1998, 1482, pp. 9-18
12. Derbyshire, A., Gause, J., and Luk, W.: 'Incremental routing for run-time parametrisable designs'. Proc. 3rd Workshop on Reconfigurable Computing and Applications, 2003
13. Luk, W., Kean, T., Derbyshire, A., Gause, J., McKeever, S.W., and Yeow, A.: 'Parameterised hardware libraries for configurable system-on-chip technology'. Proc. of World Multiconference on Systemics, Cybernetics and Informatics, 2001, vol. XV, pp. 223-228
14. James-Roxby, P., Cerro-Prada, E., and Charlwood, S.: 'Core-based design methodology for reconfigurable computing applications', IEE Proc., Comput. Digit. Tech., 2000, 147, (3), pp. 142-146
15. Derbyshire, A., and Luk, W.: 'Compiling run-time parametrisable designs'. Proc. IEEE Int. Conf. on Field-programmable Technology, 2002, pp. 44-51
16. Sikora, T., and Makai, B.: 'Shape-adaptive DCT for generic coding of video', IEEE Trans. Circuits Syst. Video Technol., 1995, 5, pp. 59-62
17. Gause, J., Cheung, P.Y.K., and Luk, W.: 'Static and dynamic reconfigurable designs of a 2 D shape-adaptive DCT', Lect. Notes Comput. Sci., 2000, 1896, pp. 96-105
18. Gause, J., Cheung, P.Y.K., and Luk, W.: 'Reconfigurable shape-adaptive template matching architectures'. Proc. IEEE Symp. on Field-Programmable Custom Computing Machines, 2002, pp. 98-107