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Volumn 1896, Issue , 2000, Pages 96-105

Static and dynamic reconfigurable designs for a 2D shape-adaptive DCT

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATION THEORY; DISCRETE COSINE TRANSFORMS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); IMAGE CODING; INTEGRATED CIRCUIT DESIGN; RECONFIGURABLE ARCHITECTURES; VIDEO SIGNAL PROCESSING;

EID: 10044227107     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-44614-1_11     Document Type: Conference Paper
Times cited : (7)

References (13)
  • 1
    • 0032203856 scopus 로고    scopus 로고
    • VLSI Implementations of Image and Video Multimedia Processing Systems
    • Pirsch, P., Stolberg, H.-J.: VLSI Implementations of Image and Video Multimedia Processing Systems. IEEE Trans. Circuits Syst. Video Technol. 8 (1998) 878-891
    • (1998) IEEE Trans. Circuits Syst. Video Technol , vol.8 , pp. 878-891
    • Pirsch, P.1    Stolberg, H.-J.2
  • 2
    • 84947575980 scopus 로고    scopus 로고
    • Overview of the MPEG-4 Standard
    • MPEG Group: Overview of the MPEG-4 Standard. ISO/IEC JTC1/SC29/WG11 N2725 (1999)
    • (1999) ISO/IEC JTC1/SC29/WG11
  • 4
    • 84947572603 scopus 로고    scopus 로고
    • MPEG-4 Video Verification Model Version 15.0
    • MPEG Group: MPEG-4 Video Verification Model Version 15.0. ISO/IEC JTC1/ SC29/WG11 N3093 (1999)
    • (1999) ISO/IEC JTC1/ SC29/WG11
  • 5
    • 0034174010 scopus 로고    scopus 로고
    • Video Image Processing with the SONIC Architecture
    • Haynes, S.D., Stone, J., Cheung, P.Y.K., Luk, W.: Video Image Processing with the SONIC Architecture. IEEE Computer 33 (2000) 50-57
    • (2000) IEEE Computer , vol.33 , pp. 50-57
    • Haynes, S.D.1    Stone, J.2    Cheung, P.3    Luk, W.4
  • 6
    • 84947585917 scopus 로고    scopus 로고
    • VLSI-Architecture of a Time-Recursive 2-D Shape-Adaptive DCT Processor for Generic Coding of Video. Proc. Intern
    • Le, T., Wendt, M., Glesner, M.: VLSI-Architecture of a Time-Recursive 2-D Shape-Adaptive DCT Processor for Generic Coding of Video. Proc. Intern. Conf. on Signal Processing Applications and Technology (1997) 1238-1242
    • (1997) Conf. On Signal Processing Applications and Technology , pp. 1238-1242
    • Le, T.1    Wendt, M.2    Glesner, M.3
  • 7
    • 84947546507 scopus 로고    scopus 로고
    • A New Flexible Architecture for Variable Length DCT Targeting Shape-Adaptive Transform. Proc. IEEE International Conference on Acoustics
    • Le, T., Glesner, M.: A New Flexible Architecture for Variable Length DCT Targeting Shape-Adaptive Transform. Proc. IEEE International Conference on Acoustics, Speech, and Signal Processing 4 (1999) 1949-1952
    • (1999) Speech, and Signal Processing , vol.4 , pp. 1949-1952
    • Le, T.1    Glesner, M.2
  • 8
    • 0016310744 scopus 로고
    • A New Hardware Realization of Digital Filters. IEEE Trans. Acoust., Speech
    • Peled, A., Liu, B.: A New Hardware Realization of Digital Filters. IEEE Trans. Acoust., Speech, Signal Process. 22 (1974) 456-462
    • (1974) Signal Process , vol.22 , pp. 456-462
    • Peled, A.1    Liu, B.2
  • 9
    • 0023400879 scopus 로고
    • A Concurrent Architecture for VLSI Implementation of Discrete Cosine Transform
    • Sun, M.T., Wu, L., Liou, M.L.: A Concurrent Architecture for VLSI Implementation of Discrete Cosine Transform. IEEE Trans. Circuits Syst. 34 (1987) 992-994
    • (1987) IEEE Trans. Circuits Syst , vol.34 , pp. 992-994
    • Sun, M.T.1    Wu, L.2    Liou, M.L.3
  • 13
    • 0032674941 scopus 로고    scopus 로고
    • Partitioning Sequential Circuits on Dynamically Reconfigurable FPGAs
    • Chang, D., Marek-Sadowska, M.: Partitioning Sequential Circuits on Dynamically Reconfigurable FPGAs. IEEE Trans. on Computers 48 (1999) 565-578
    • (1999) IEEE Trans. On Computers , vol.48 , pp. 565-578
    • Chang, D.1    Marek-Sadowska, M.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.