Modelling the dynamic response of on-chip decoupling capacitors

Proceedings - 8th IEEE Workshop on Signal Propagation on Interconnects

Volumn , Issue , 2004, Pages 39-42

  Vázquez, Josep Rius ^a   Meijer, Maurice ^b  

^a UNIVERSITAT POLITÈCNICA DE CATALUNYA   (Spain)

^b PHILIPS RESEARCH LABORATORIES   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

BOUNDARY CONDITIONS; DIGITAL CIRCUITS; DYNAMICS; ELECTRIC CURRENTS; ELECTRIC POTENTIAL; MATHEMATICAL MODELS; MICROPROCESSOR CHIPS; MOS DEVICES;

DECOUPLING CAPACITORS; DEOUPLING CAPACITORS; ELECTRICAL SIMULATORS; MOS MODELS;

CAPACITORS;

EID: 10044250104     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)

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