Side-gate design optimization of 50 nm MOSFETs with electrically induced source/drain

Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers

Volumn 41, Issue 4 B, 2002, Pages 2345-2347

  Choi, Woo Young ^a   Choi, Byung Yong ^a   Woo, Dong Soo ^a   Choi, Young Jin ^a   Lee, Jong Duk ^a   Park, Byung Gook ^a  

^a Seoul National University   (South Korea)

Author keywords

Current drivability; Device optimization; Hot carrier effect; Short channel effect; Side gate; Simulation

Indexed keywords

COMPUTER SIMULATION; HOT CARRIERS; MOS DEVICES; POLYSILICON;

CURRENT DRIVABILITY; DEVICE OPTIMIZATION; HOT CARRIER EFFECT; SHORT CHANNEL EFFECT; SIDE-GATE;

MOSFET DEVICES;

EID: 0842299246     PISSN: 00214922     EISSN: None     Source Type: Journal    
DOI: 10.1143/JJAP.41.2345     Document Type: Article

References (8)

1. M. Saito, T. Yoshitomi, M. Ono, Y. Akasaka, H. Nii, S. Matsuda, H. S. Momose, Y. Katsumata, Y. Ushiku and H. Iwai: Int. Electron Device Meet. Tech. Dig. (1992) p. 897.
2. Y. Kiyota, T. Nakamura and T. Inada: Symp. on VLSI Tech. (1993), p. 97.
3. B.G. Park, J. Bokor, H. S. Luftman, C. S. Rafferty and M. R. Pinto: IEEE Electon Device Lett. 13 (1992) 507.
4. H. Noda, F. Murai and S. Kimura: Int. Electron Device Meet. Tech. Dig. (1993) p. 123.
5. H. Noda, F. Murai and S. Kimura: IEEE Trans. Electron Devices 41 (1994) 1841.
6. H. Kawaura, T. Sakamoto, T. Baba, Y. Ochiai, J. Fujita and J. Sone: IEEE Trans. Electron Devices 47 (2000) 856.
7. W. Y. Choi, S. K. Sung, K. R. Kim, J. D. Lee and B. G. Park: Asia-Pacific Workshop on Fundamental and Application of Advanced Semiconductor Devices (2001) p. 11.
8. B. Y. Choi, S. K. Sung, B. G. Park and J. D. Lee: Jpn. J. Appl. Phys. 40 (2001) 2607.