A daily production model for wafer fabrication

International Journal of Advanced Manufacturing Technology

Volumn 23, Issue 1-2, 2004, Pages 58-63

  Pai, Ping Feng ^a   Lee, Ching En ^b   Su, Tzu Haw ^c  

^a DA YEH UNIVERSITY   (Taiwan)

^b NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

^c TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY   (Taiwan)

Author keywords

Cycle time; Line balancing; Planned target; Wafer fabrication

Indexed keywords

ALGORITHMS; COMPUTER SIMULATION; PHOTOLITHOGRAPHY; PREVENTIVE MAINTENANCE; SPUTTERING;

CYCLE TIME; LINE BALANCING; PLANNED TARGET; WAFER FABRICATION;

PRODUCTION ENGINEERING;

EID: 0842288947     PISSN: 02683768     EISSN: None     Source Type: Journal    
DOI: 10.1007/s00170-002-1506-9     Document Type: Article

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