Large domains of continuous grain silicon on glass substrate for high-performance TFTs

IEEE Transactions on Electron Devices

Volumn 51, Issue 2, 2004, Pages 204-211

  Mizuki, Toshio ^a   Matsuda, Junko Shibata ^b,c   Nakamura, Yoshinobu ^a   Takagi, Junkoh ^a   Yoshida, Toyonobu ^b  

^a SHARP CORPORATION   (Japan)

^b UNIVERSITY OF TOKYO   (Japan)

^c SUPERCONDUCTIVITY RESEARCH LABORATORY   (Japan)

Author keywords

Grain boundaries; Grain size; Solid phase crystallization; Thin film transistor

Indexed keywords

CRYSTAL ORIENTATION; CRYSTALLIZATION; ELECTRONIC DENSITY OF STATES; GLASS; GRAIN BOUNDARIES; LOW TEMPERATURE PROPERTIES; PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION; POLYSILICON; STACKING FAULTS; THIN FILM TRANSISTORS;

CONTINUOUS GRAIN SILICON; LOW TEMPERATURE POLYCRYSTALLINE SILICON; MODIFIED LEVINSON ANALYSIS; SOLID PHASE CRYSTALLIZATION;

SEMICONDUCTING SILICON;

EID: 0442326801     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2003.821770     Document Type: Article

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