New approaches to simulation-assisted design and process development

Solid State Technology

Volumn 40, Issue 3, 1997, Pages

  Walk, H ^a   Schafer M ^a   Gluck M ^b   Konig U ^b  

^a CADwalk Simulation and Design ^*  (Germany)

^b DAIMLER AG   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 0347957167     PISSN: 0038111X     EISSN: None     Source Type: Trade Journal    
DOI: None     Document Type: Article

References (8)

1. SILVACO International, Virtual Wafer Fab Interactive Simulation Tools for Semiconductor Design Tools: ATHENA™ Process Simulator, ATLAS™ Device Simulator, BLAZE™ Heterostructure Simulation Tool.
2. G. Wachutka, P. Voigt, "Computer-Aided Training in Design and Fabrication of Microdevices and Systems," Proc. of the 3rd Intern. Conf. on Computer Aided Engineering Education, pp. 345-350, 13-15.9, Bratislava, 1995.
3. T. Mimura, S. Hiyamizu, T. Fujii, K. Nanbu, "A new field-effect transistor with selectively doped GaAs/n-Al(x)Ga(1-X)As heterojunctions," Jpn. J. Appl. Phys., Vol. 19 (5), pp. 225-227, 1980.
4. R. Hagelauer, T. Ostermann, U. König, M. Glück, G. Höck, "Performance Estimation of Si/SiGe Hetero-CMOS Circuits," to appear in IEEE Electronics Lett., Vol. 33, No. 3.
5. max n-type Si/SiGe MODFETs," accepted for publication in IEEE Electronics Letters, Jan. 1997.
6. M. Glück, et al., submitted to IEEE Electron Dev. Lett.
7. K. Ismail, "Si/SiGe High-Speed Field-Effect Transistors," Proc. of the IEDM'95, pp. 509-512, Washington, 1995.
8. A.G. O'Neill, D. A. Antoniadis, "Deep Submicron CMOS Based on Silicon Germanium Technology," IEEE Trans. on Electron Dev., Vol. ED-43, No. 6, pp. 911-918, 1996.