Study of pattern density effects in CMP using fixed abrasive pads

Journal of the Electrochemical Society

Volumn 150, Issue 12, 2003, Pages

  Gorantla, Venkata R ^a   Venigalla, Rajasekhar ^a,b   Economikos, Laertis ^b   O'Connor, Daniel R ^c   Babu, S V ^a  

^a Clarkson University   (United States)

^b IBM MICROELECTRONICS   (United States)

^c EASTMAN KODAK COMPANY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ABRASIVES; ELECTRONICS PACKAGING; INTEGRATED CIRCUIT MANUFACTURE; SILICA; SILICON WAFERS; SURFACE TOPOGRAPHY;

CHEMICAL-MECHANICAL PLANARIZATION; PATTERN DENSITY EFFECT;

CHEMICAL MECHANICAL POLISHING;

EID: 0347051507     PISSN: 00134651     EISSN: None     Source Type: Journal    
DOI: 10.1149/1.1627349     Document Type: Article

References (20)

1. L. Peters, Semicond. Int., 1999 (April).
2. J. Schlueter, Semicond. Int., 1999 (Oct).
3. S. Wolf and R. N. Tauber, Silicon Processing for the VLSI Era, Vol. 1, p. 830, Lattice Press, CA (2000).
4. J. J. Gagliardi and T. Vo, in Proceedings of the CMP-MIC Conference, IMIC, p. 373 (2000).
5. A. Romer, T. Donohue, J. J. Gagliardi, F. Weimar, P. Theime, and M. Hollatz, in Proceedings of the CMP-MIC Conference, IMIC, p. 265, (2000).
6. Y.-L. Wang, C. Liu, M.-S. Feng, J. Dun, and K.-S. Chou, Thin Solid Films, 308-309, 543 (1997).
7. S.-D. Kim, I.-S. Hwang, H.-M. Park, J.-K. Rhee, and C.-W. Nam, J. Vac. Sci. Technol. B, 20, 918 (2002).
8. R. Srinivasan, S. V. Babu, W. G. America, and Y.-S. Her, U.S. Pat. 6,468,910 (2002)
9. R. Srinivasan, S. V. Babu, W. G. America, and Y.-S. Her, U.S. Pat. 6,491,843 (2002).
10. L. Economikos, F.-F. Jamin, A. Ticknor, and A. Simpson, in Proceedings of CMP-MIC Conference, IMIC, p. 553 (2001).
11. V. H. Nguyen, A. J. Hof, H. van Kranenburg, P. H. Woerlee, and F. Weimar, Microelectron. Eng., 55, 305 (2001).
12. V. N. Koinkar, R. Golzarian, M. VanHanehem, Q. Luo, J. Shen, P. Burke, T. Fletcher, L. Hardy, J. Kollodge, and J. Trice, in Proceedings of the CMP-MIC Conference, IMIC, p. 58 (2000).
13. J. J. Gagliardi and T. Vo, in Proceedings of the 16th International VLSI Multilevel Interconnect Conference, IEEE, p. 223 (1999).
14. T. Vo, T. Bulley, and J. J. Gaglardi, Solid State Technol., 2000, 123 (June).
15. A. Simpson, L. Economikos, F.-F. Jamin, and A. Ticknor, Mater. Res. Soc. Symp. Proc., 671, M4.1 (2001).
16. B. E. Stine, D. O. Ouma, R. R. Divecha, D. S. Boning, J. E. Chung, D. L. Hetherington, I. Ali, G. Shinn, J. Clark, O. S. Nakagawa, and S.-Y. Oh, in Proceedings of the CMP-MIC Conference, IMIC, p. 266 (1997).
17. B. E. Stine, D. O. Ouma, R. R. Divecha, D. S. Boning, J. E. Chung, D. L. Hetherington, C. R. Larwood, O. S. Nakagawa, and S.-Y. Oh, IEEE Trans. Semicond. Manuf., 11, 129 (1998).
18. R. S. Subramanian and R. M. Appat, Electrochem. Solid-State Lett., 4, G115 (2001).
19. D. Ouma, B. Lee, and D. S. Boning, Characterization for STI, Version 1.2, MIT, (1999).
20. B. Lee, D. S. Boning, and L. Economikos, in Proceedings of the CMP-MIC Conference, IMIC, p. 395 (2001).