Power Estimation of Digital Data Paths Using HEAT

IEEE Design and Test of Computers

Volumn 17, Issue 2, 2000, Pages 101-110

  Satyanarayana, Janardhan H ^a,b,c   Parhi, Keshab K ^c,d,e,f  

^a LUCENT TECHNOLOGIES   (United States)

^b NATIONAL INSTITUTE OF TECHNOLOGY   (India)

^c UNIVERSITY OF MINNESOTA   (United States)

^d INDIAN INSTITUTE OF TECHNOLOGY   (India)

^e UNIVERSITY OF PENNSYLVANIA   (United States)

^f UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 0346479457     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/54.844339     Document Type: Article

References (11)

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3. J.H. Satyanarayana and K.K. Parhi, "HEAT: Hierarchical Energy Analysis Tool," Proc. IEEE/ACM Design Automation Conf., Las Vegas, Nev., June 1996, pp. 9-14.
4. T. Quarles, The SPICE3 Implementation Guide, Tech. Report M89-44, Electronics Research Laboratory, University of California, Berkeley, Apr. 1989.
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11. M. Kuhlmann and K.K. Parhi, "Power Comparison of Flow-Graph and Distributed Arithmetic Based DCTs," Proc. 1998 Asilomar Conf. Signals, Systems and Computers, Nov. 1998, pp. 1,214-1,219.