Low-energy programmable finite field data path architectures

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 2, Issue , 1998, Pages 406-409

  Song, Leilei ^a   Parhi, Keshab K ^a   Kuroda, Ichiro ^a   Nishitani, Takao ^a  

^a UNIVERSITY OF MINNESOTA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTATIONAL METHODS; POLYNOMIALS; SYSTOLIC ARRAYS; VECTORS;

DOMAIN-SPECIFIC PROGRAMMABLE DIGITAL SIGNAL PROCESSORS (DS-PDSP); LOW ENERGY PROGRAMMABLE FINITE FIELD DATA PATH ARCHITECTURES; POLYNOMIAL MULTIPLICATION; SEMI-SYSTOLIC ARRAYS;

DIGITAL SIGNAL PROCESSING;

EID: 0031623041     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)