Initial sizing of analog integrated circuits by centering within topology-given implicit specifications

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers

Volumn , Issue , 2003, Pages 241-246

  Stehr, Guido ^a   Pronath, Michael ^b   Schenkel, Frank ^b   Graeb, Helmut ^a   Antreich, Kurt ^a  

^a TECHNICAL UNIVERSITY OF MUNICH   (Germany)

^b MunEDA GmbH   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

APPROXIMATION THEORY; COMPUTER SIMULATION; ELECTRIC NETWORK TOPOLOGY; ELECTRIC POTENTIAL; GENETIC ALGORITHMS; HIERARCHICAL SYSTEMS; ITERATIVE METHODS; MATHEMATICAL TRANSFORMATIONS; OPTIMIZATION; TRANSISTORS; VECTORS;

ANALOG CIRCUITS; LOW VOLTAGE DESIGNS;

INTEGRATED CIRCUITS;

EID: 0346148467     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/iccad.2003.159696     Document Type: Conference Paper

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