Generic RAM-based architecture for two-dimensional discrete wavelet transform with line-based method

IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS

Volumn 1, Issue , 2002, Pages 363-366

  Tseng, Po Chih ^a   Huang, Chao Tsung ^a   Chen, Liang Gee ^a  

^a NATIONAL TAIWAN UNIVERSITY   (Taiwan)

Author keywords

Arithmetic; Chaos; Computer architecture; Costs; Digital signal processing; Discrete wavelet transforms; Filters; Hardware; Image coding; Random access memory

Indexed keywords

CHAOS THEORY; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; COSTS; DIGITAL ARITHMETIC; DIGITAL SIGNAL PROCESSING; FILTERS (FOR FLUIDS); HARDWARE; IMAGE CODING; MEMORY ARCHITECTURE; ONE DIMENSIONAL; RANDOM ACCESS STORAGE; SIGNAL PROCESSING; WAVELET TRANSFORMS;

EFFICIENT ARCHITECTURE; HARDWARE ARCHITECTURE; LIFTING-BASED ARCHITECTURES; PROPOSED ARCHITECTURES; RAM-BASED ARCHITECTURES; RANDOM ACCESS MEMORY; RECURSIVE PYRAMID ALGORITHMS; TWO-DIMENSIONAL DISCRETE WAVELET TRANSFORM;

DISCRETE WAVELET TRANSFORMS;

EID: 0344436241     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/APCCAS.2002.1114971     Document Type: Conference Paper

References (11)

1. S. G. Mallat, "A theory for multiresolution signal decomposition: The wavelet representation," IEEE Transactions on Pattern Analysis and Machine Intelligence, vol. 11, no. 7, pp. 674-693, July 1989.
2. W. Sweldens, "The lifting scheme: a custom-design construction of biorthogonal wavelets," Applied and Computaional Harmonic Analysis, vol. 3, no. 15, pp. 186-200, 1996.
3. C. Chakrabarti, M. Vishwanath, and R. M. Owens, "Architectures for wavelet transforms: A survey," Journal of VLSI Signal Processing, vol. 14, pp. 171-192, 1996.
4. M. Vishwanath, R. M. Owens, and M. J. Irwin, "VLSI architectures for the discrete wavelet transform," IEEE Transactions on Circuis and Systems-II: Analog and digital signal processing, vol. 42, no. 5, pp. 305-316, May 1995.
5. P.-C. Wu and L.-G. Chen, "An efficient architecture for two-dimensional discrete wavelet transform," IEEE Transactions on Circuits and Systems for Video Technology, vol. 11, no. 4, pp. 536-545, Apr. 2001.
6. N. D. Zervas and et al., "Evaluation of design alternatives for the 2-D-discrete wavelet transform," IEEE Transactions on Circuits and Systems for Video Technology, vol. 11, no. 12, pp. 1246-1262, Dec. 2001.
7. C. Chrysafis and A. Ortega, "Line-based, reduced memory, wavelet image compression," IEEE Transactions on Image processing, vol. 9, no. 3, pp. 373-389, Mar. 2000.
8. C. Diou, L. Torres, and M. Robert, "A wavelet core for video processing," in Proc. of International Conference on Image Processing, 2000, pp. 395-398.
9. P.-C. Tseng, C.-T. Huang, and L.-G. Chen, "VLSI implementation of shape-adaptive discrete wavelet transform," in Proc. of SPIE International Conference on Visual Communications and Image Processing, 2002, pp. 655-666.
10. M. Vishwanath, "The recursive pyramid algorithm for the discrete wavelet transform," IEEE Transactions on Signal Processing, vol. 42, no. 3, pp. 673-677, Mar. 1994.
11. C.-T. Huang, P.-C. Tseng, and L.-G. Chen, "Efficient VLSI architectures of lifting-based discrete wavelet transform by systematic design method," in IEEE International Symposium on Circuits and Systems, 2002, vol. 5, pp. 565-568.