An efficient architecture for two-dimensional discrete wavelet transform

IEEE Transactions on Circuits and Systems for Video Technology

Volumn 11, Issue 4, 2001, Pages 536-545

  Wu, Po Cheng ^b   Chen, Liang Gee ^a,c  

^a IEEE   (Taiwan)

^b INSTITUTE FOR INFORMATION INDUSTRY   (Taiwan)

^c NATIONAL TAIWAN UNIVERSITY   (Taiwan)

Author keywords

Decimation filters; Discrete wavelet transform; Image compression; JPEG 2000; Multirate digital signal processing

Indexed keywords

COEFFICIENT FOLDING TECHNIQUE; DECIMATION FILTERS; DISCRETE WAVELET TRANSFORM; JOINT PHOTOGRAPHIC EXPERTS GROUP; MULTIPLEXER; POLYPHASE DECOMPOSITION TECHNIQUE; VLSI ARCHITECTURE;

ALGORITHMS; DIGITAL SIGNAL PROCESSING; ELECTRIC FILTERS; INTEGRATED CIRCUIT LAYOUT; RANDOM ACCESS STORAGE; TWO DIMENSIONAL; VLSI CIRCUITS; WAVELET TRANSFORMS;

IMAGE COMPRESSION;

EID: 0035308596     PISSN: 10518215     EISSN: None     Source Type: Journal    
DOI: 10.1109/76.915359     Document Type: Article

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