Formally analyzed dynamic synthesis of hardware

Journal of Supercomputing

Volumn 19, Issue 1, 2001, Pages 7-22

  Susanto, Kong Woei ^a   Melham, Tom ^a  

^a UNIVERSITY OF GLASGOW   (United Kingdom)

Author keywords

Dynamic hardware reconfiguration; Formal verification; FPGAs; Partial evaluation; Theorem proving

Indexed keywords

ALGORITHMS; FIELD PROGRAMMABLE GATE ARRAYS; ONLINE SYSTEMS; STATIC RANDOM ACCESS STORAGE; TABLE LOOKUP; THEOREM PROVING;

DYNAMIC HARDWARE RECONFIGURATIONS;

COMPUTER HARDWARE;

EID: 0342468085     PISSN: 09208542     EISSN: None     Source Type: Journal    
DOI: 10.1023/A:1011132326153     Document Type: Article

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