Coupled electro-thermal modeling and optimization of clock networks

Microelectronics Journal

Volumn 34, Issue 12 SPEC.ISS., 2003, Pages 1175-1185

  Casu, Mario R ^a   Graziano, Mariagrazia ^a   Masera, Guido ^a   Piccinini, Gianluca ^a   Zamboni, Maurizio ^a  

^a POLITECNICO DI TORINO   (Italy)

Author keywords

Clock networks; Electromigration; Electrothermal simulation; Interconnect self heating

Indexed keywords

COMPUTER SIMULATION; DIGITAL INTEGRATED CIRCUITS; ELECTROMIGRATION; HIGH TEMPERATURE EFFECTS; MICROPROCESSOR CHIPS; NETWORKS (CIRCUITS); RELIABILITY; THERMAL CONDUCTIVITY; TRANSISTORS;

CLOCK NETWORKS;

TIMING CIRCUITS;

EID: 0242658527     PISSN: 00262692     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0026-2692(03)00208-8     Document Type: Article

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