Stacked metal layers as gates for MOSFET threshold voltage control

Materials Research Society Symposium - Proceedings

Volumn 765, Issue , 2003, Pages 3-8

  Gao, Wei ^a   Conley, John F ^a   Ono, Yoshi ^a  

^a SHARP LABORATORIES OF AMERICA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; DIELECTRIC MATERIALS; ELECTRIC VARIABLES MEASUREMENT; GATES (TRANSISTOR); MOS CAPACITORS; THERMAL VARIABLES MEASUREMENT; THERMODYNAMIC STABILITY; THICKNESS MEASUREMENT; THRESHOLD VOLTAGE; VOLTAGE CONTROL;

FLAT BAND VOLTAGE TRANSITIONS; STACKED METAL LAYERS; THERMAL OXIDE GATE DIELECTRIC; THRESHOLD VOLTAGE CONTROL; WORKFUNCTION TUNING MECHANISM;

MOSFET DEVICES;

EID: 0242409691     PISSN: 02729172     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1557/proc-765-d1.4     Document Type: Conference Paper

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