Analyzing crosstalk in the presence of weak bridge defects

Proceedings of the IEEE VLSI Test Symposium

Volumn 2003-January, Issue , 2003, Pages 385-392

  Irajpour, S ^a   Nazarian, S ^a   Wang, Lei ^a   Gupta, S K ^a   Breuer, M A ^a  

^a UNIVERSITY OF SOUTHERN CALIFORNIA   (United States)

Author keywords

Analytical models; Bridge circuits; Character generation; Circuit testing; Crosstalk; Inverters; MOSFETs; Performance analysis; Performance evaluation; System testing

Indexed keywords

ANALYTICAL MODELS; BRIDGE CIRCUITS; CROSSTALK; ELECTRIC INVERTERS; TESTING; VLSI CIRCUITS;

CHARACTER GENERATION; CIRCUIT TESTING; MOSFETS; PERFORMANCE ANALYSIS; PERFORMANCE EVALUATION; SYSTEM TESTING;

ELECTRIC NETWORK ANALYSIS;

EID: 0142127691     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VTEST.2003.1197679     Document Type: Conference Paper

References (8)

1. Chen, W. Y., Breuer, M. A., Gupta, S. K., "Analytic model for crosstalk delay and pulse analysis for non-ideal inputs", Int'l Test Conference, pp. 809-818, 1997.
2. Chen, W. Y., Gupta, S. K., Breuer, M. A., "Test generation in VLSI circuits for crosstalk noise", Int'l. Test Conf., pp. 641-650, 1998.
3. Chen, W. Y., Gupta, S. K., Breuer, M. A., "Test generation for crosstalk-induced delay in integrated circuits", Int'l. Test Conf., pp 191-200, 1999.
4. Chen, W. Y., Gupta, S. K., Breuer, M. A., "Test generation for crosstalk-induced faults: Framework and computational results", Journal of Electronic Testing, vol. 18, no. 1, pp. 17-28, Feb. 2002.
5. Moore, W., Gronthoud, G., Baker, K., Lousberg, M., "Delay-fault testing and defects in deep sub micron ICs - Does critical resistance really mean anything?" Int'l. Test Conf., pp. 95-104, 2000.
6. Ferguson, F. J., Shen, J. P., "A CMOS fault extractor for inductive fault analysis", IEEE Transactions on Computer-Aided Design, vol. 7, no. 11, pp. 1181-1194, Nov. 1988.
7. Jee, A., Ferguson, F. J., "Carafe: An inductive fault analys is tool for CMOS VLSI circuits ", IEEE VLSI Test Symposium, pp. 92-98, 1993.
8. Hawkins, C. F., Soden, J. M., Righter, A. W., Ferguson, F. J., "Defect classes - An overdue paradigm for CMOS IC testing", Int'l. Test Conf., pp 413-425, 1994.