A high-performance/low-latency vector rotational CORDIC architecture based on extended elementary angle set and trellis-based searching schemes

IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

Volumn 50, Issue 9, 2003, Pages 589-601

  Wu, Cheng Shing Benoir ^a   Wu, An Yeu Andy ^b   Lin, Chih Hsiu Zhi Xiu ^b  

^a NATIONAL CENTRAL UNIVERSITY   (Taiwan)

^b NATIONAL TAIWAN UNIVERSITY   (Taiwan)

Author keywords

Angle recording (AR); Coordinate rotational digital computer (CORDIC) algorithm; Extended elementary angle set (EEAS); Trellis based searching (TBS)

Indexed keywords

ALGORITHMS; CODES (SYMBOLS); COMPUTER SYSTEMS; NUMERICAL METHODS; SIGNAL TO NOISE RATIO; TRELLIS CODES; VLSI CIRCUITS;

COORDINATE ROTATIONAL DIGITAL COMPUTER ALGORITHM; SIGNAL TO QUANTIZATION NOISE RATIO; TRELLIS BASED SEARCHING ALGORITHM;

DIGITAL SIGNAL PROCESSING;

EID: 0141954028     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSII.2003.816923     Document Type: Article

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