The effect of overlay APC control on cascading levels-perturbations of the reference level

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 5038 II, Issue , 2003, Pages 1002-1011

  Conway, Tim ^a   Misra, Manish ^b   Carlson, Alan ^b   Crow, David ^b  

^a CYPRESS SEMICONDUCTOR   (United States)

^b INFICON Patterning Solutions   (United States)

Author keywords

APC; Metrology; Overlay; Process control; Registration; Reticle; Scanners; Steppers

Indexed keywords

ALGORITHMS; CASCADE CONTROL SYSTEMS; COMPUTER SIMULATION; CONTROLLABILITY; FACTORY AUTOMATION; FEEDBACK CONTROL; MASKS; OPTIMIZATION; PHOTOLITHOGRAPHY; PROCESS CONTROL;

ADVANCED PROCESS CONTROL; OVERLAY; RETICLE; STEPPER;

SEMICONDUCTOR DEVICE MANUFACTURE;

EID: 0141500151     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.484999     Document Type: Conference Paper

References (8)

1. Hand A., "Mix-and-Match Lithography Tackles Tighter Requirements", Semiconductor International, February 2003.
2. Sturtevant J., "Implementation of a Closed-Loop CD and Overlay Controller for sub-0.25-μm Patterning", Proceedings of SPIE, v 3332 1998, 461-470.
3. Reuel R., "Run to Run Overlay Control Using APC Feedback", AEC/APC Symposium XIII Proceedings 2001, 1295-1306.
4. Carlson A., DiBiase D., "Effect of Metrology Time Delay on Overlay APC", Proceedings of SPIE, v, 4692 2002, p 1-16.
5. Crow D., "Improving Overlay Performance in Lithography Tools Using Run-to-Run Control", Micro Magazine, January/February 2003, p 25-30.
6. Crow D., Joubert E., "Application of Feedforward Reticle - Offset for Overlay APC in a High Part Count Fab", SPIE Proceedings Volume 4689 (2002).
7. Conway et al., "Improving Overlay Control Through Proper Use of Multi-Level Query APC", Proceedings of SPIE, (to be published 2003).
8. Crow et al., "A Comprehensive Analysis of Statistical and Model-Based Overlay Lot Disposition Methods", Proceedings of SPIE, v 4344 2001, p 127-138.