Model checking of hierarchical state machines

ACM Transactions on Programming Languages and Systems

Volumn 23, Issue 3, 2001, Pages 273-303

  Alur, Rajeev ^a   Yannakakis, Mihalis ^b  

^a UNIVERSITY OF PENNSYLVANIA   (United States)

^b LUCENT TECHNOLOGIES   (United States)

Author keywords

D.2.2 Design Tools and Techniques : State diagrams, Object oriented design methods; D.2.4 Software Program Verification : Formal methods, Model checking; F.3.1 Specifying and Verifying and Reasoning about Programs : Mechanical verification

Indexed keywords

FINITE STATE MACHINES (FSM); SOFTWARE VERIFICATION;

ALGORITHMS; BOOLEAN FUNCTIONS; COMPUTATIONAL COMPLEXITY; COMPUTER AIDED SOFTWARE ENGINEERING; ERROR ANALYSIS; FINITE AUTOMATA; MATHEMATICAL MODELS; OBJECT ORIENTED PROGRAMMING;

HIERARCHICAL SYSTEMS;

EID: 0042908982     PISSN: 01640925     EISSN: None     Source Type: Journal    
DOI: 10.1145/503502.503503     Document Type: Article

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