Recent advances and future prospects in single-electronics

Proceedings - Design Automation Conference

Volumn , Issue , 2003, Pages 274-275

  Wasshuber, Christoph ^a  

^a TEXAS INSTRUMENTS   (United States)

Author keywords

MOSFET; Random background charge; SET; Single electron logic

Indexed keywords

ELECTRIC NETWORK ANALYSIS; ELECTRON TUNNELING; SIMULATORS; TUNNEL JUNCTIONS;

SINGLE-ELECTRON TRANSISTORS;

TRANSISTORS;

EID: 0042134895     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/775832.775901     Document Type: Conference Paper

References (7)

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2. H. Inokawa, A. Fujiwara, and Y. Takahashi. A Multiple-Valued Logic with Merged Single-Electron and MOS Transistors. Technical Digest of the IEDM, 2001, 147-150.
3. K. Uchida, T. Tanamoto, R. Ohba, S. Yasuda, and S. Fujita. Single-Electron Random-Number Generator (RNG) for Highly Secure Ubiquitous Computing Applications. Technical Digest of the IEDM, 2002, 177-180.
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5. X. Wang and W. Porod. Single-electron transistor analytic IV model for SPICE simulations. Superlattices and Microstructures. Vol. 28, No. 5/6, 2000, 345-349.
6. C. Wasshuber. Computational Single-Electronics. Springer Verlag, ISBN: 321183558X, 2001.
7. SIMON (Simulation of Nanostructures) http://www.lybrary.com/simon/