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Volumn , Issue , 2003, Pages 274-275

Recent advances and future prospects in single-electronics

Author keywords

MOSFET; Random background charge; SET; Single electron logic

Indexed keywords

ELECTRIC NETWORK ANALYSIS; ELECTRON TUNNELING; SIMULATORS; TUNNEL JUNCTIONS;

EID: 0042134895     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/775832.775901     Document Type: Conference Paper
Times cited : (9)

References (7)
  • 2
    • 0035718150 scopus 로고    scopus 로고
    • A multiple-valued logic with merged single-electron and MOS transistors
    • H. Inokawa, A. Fujiwara, and Y. Takahashi. A Multiple-Valued Logic with Merged Single-Electron and MOS Transistors. Technical Digest of the IEDM, 2001, 147-150.
    • (2001) Technical Digest of the IEDM , pp. 147-150
    • Inokawa, H.1    Fujiwara, A.2    Takahashi, Y.3
  • 3
    • 0036923357 scopus 로고    scopus 로고
    • Single-electron Random-Number Generator (RNG) for highly secure ubiquitous computing applications
    • K. Uchida, T. Tanamoto, R. Ohba, S. Yasuda, and S. Fujita. Single-Electron Random-Number Generator (RNG) for Highly Secure Ubiquitous Computing Applications. Technical Digest of the IEDM, 2002, 177-180.
    • (2002) Technical Digest of the IEDM , pp. 177-180
    • Uchida, K.1    Tanamoto, T.2    Ohba, R.3    Yasuda, S.4    Fujita, S.5
  • 5
    • 0034315024 scopus 로고    scopus 로고
    • Single-electron transistor analytic IV model for SPICE simulations
    • X. Wang and W. Porod. Single-electron transistor analytic IV model for SPICE simulations. Superlattices and Microstructures. Vol. 28, No. 5/6, 2000, 345-349.
    • (2000) Superlattices and Microstructures , vol.28 , Issue.5-6 , pp. 345-349
    • Wang, X.1    Porod, W.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.