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Volumn 38, Issue 4 B, 1999, Pages 2360-2367

Multilevel aluminum dual-damascene interconnects for process-step reduction in 0.18 μm ULSIs

Author keywords

Al interconnect; Borderless via; Dual damascene interconnect; KrF lithography; SiON film; Stacked via

Indexed keywords


EID: 0041390870     PISSN: 00214922     EISSN: None     Source Type: Journal    
DOI: 10.1143/jjap.38.2360     Document Type: Article
Times cited : (4)

References (14)


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.