Multiple low swing voltage values for CPL, CVSL and Domino Logic families

Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

Volumn 2, Issue , 2000, Pages 903-906

  Rjoub, Abdoul ^a   Koufopavlou, Odysseas ^b  

^a JORDAN UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Jordan)

^b UNIVERSITY OF PATRAS   (Greece)

Author keywords

[No Author keywords available]

Indexed keywords

AREA OVERHEAD; COMPLEMENTARY PASS-TRANSISTOR LOGIC; DOMINO LOGIC; FULL-SWING; INTERNAL VOLTAGE; LOGIC FAMILIES; LOW SWING; LOW-POWER DESIGN; NO REDUCTION; OPERATING SPEED; POWER DISSIPATION; POWER DISSIPATION REDUCTION; VOLTAGE SWITCH LOGIC;

SWITCHING CIRCUITS;

LOGIC CIRCUITS;

EID: 0038791425     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICECS.2000.913022     Document Type: Conference Paper

References (6)

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