메뉴 건너뛰기




Volumn 2, Issue , 2003, Pages

Hardware-oriented optimization and block-level architecture design for MPEG-4 FGS encoder

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; COMPUTATIONAL METHODS; COMPUTER HARDWARE; OPTIMIZATION;

EID: 0038759841     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (2)

References (6)
  • 2
    • 0035279159 scopus 로고    scopus 로고
    • Overview of fine granularity scalability in MPEG-4 video standard
    • Mar.
    • W. Li, "Overview of Fine Granularity Scalability in MPEG-4 Video Standard," IEEE Trans. Circuits Syst. Video Technol., vol. 11, pp. 301-317, Mar. 2001.
    • (2001) IEEE Trans. Circuits Syst. Video Technol. , vol.11 , pp. 301-317
    • Li, W.1
  • 3
    • 0034316132 scopus 로고    scopus 로고
    • A 60-MHz 240-mW MPEG-4 videophone LSI with 16-Mb embedded DRAM
    • Nov.
    • M. Takahashi et al., "A 60-MHz 240-mW MPEG-4 Videophone LSI with 16-Mb Embedded DRAM," IEEE Journal of Solid-State Circuit, vol. 35, pp. 1713-17121, Nov. 2000
    • (2000) IEEE Journal of Solid-State Circuit , vol.35 , pp. 1713-17121
    • Takahashi, M.1
  • 4
    • 0036112363 scopus 로고    scopus 로고
    • An MPEG-4 video LSI with an errorresilient codec core based on a fast motion estimation algorithm
    • Sec. 22, Feb.
    • H. Nakayama et al., "An MPEG-4 Video LSI with an ErrorResilient Codec Core Based on a Fast Motion Estimation Algorithm," IEEE International Solid-State Circuits Conference, Sec. 22, Feb. 2002.
    • (2002) IEEE International Solid-State Circuits Conference
    • Nakayama, H.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.