Design and integration of electrical-based dimensional process-window checking infrastructure

IEEE International Conference on Microelectronic Test Structures

Volumn , Issue , 2003, Pages 103-106

  Doong, Kelvin Y Y ^a   Wang, Robin C J ^a   Huang, Jurcy C H ^b   Lin, S C ^a   Hung, L J ^a   Lee, S Z ^a   Young, K L ^a  

^a TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY   (Taiwan)

^b Silicon Canvas Inc   (United States)

Author keywords

Electronic design automation; Logic process; Migration; SoC; Synthesis; Test structure; Test vehicle

Indexed keywords

CMOS INTEGRATED CIRCUITS; LOGIC DESIGN; STATISTICAL METHODS;

ELECTRICAL TESTING;

MICROELECTRONICS;

EID: 0038642567     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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