Makyoh-topography assessment of etch and polish removal of processed circuits for substrate re-use

Microelectronic Engineering

Volumn 65, Issue 4, 2003, Pages 380-386

  Lukács, István E ^a   Riesz, Ferenc ^a  

^a RESEARCH INSTITUTE FOR TECHNICAL PHYSICS AND MATERIALS SCIENCE   (Hungary)

Author keywords

Makyoh topography; Surface flatness; Wafer reclaim

Indexed keywords

POLISHING; SEMICONDUCTOR MATERIALS; SILICON; STRAIN;

WAFER CURVATURE;

ETCHING;

EID: 0038637782     PISSN: 01679317     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0167-9317(03)00005-4     Document Type: Article

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