Implementation of a programmable 64̃2048-point FFT/IFFT processor for OFDM-based communication systems

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 2, Issue , 2003, Pages

  Kuo, Jen Chih ^a   Wen, Ching Hua ^a   Wu, An Yeu ^a  

^a NATIONAL TAIWAN UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; FAST FOURIER TRANSFORMS; VLSI CIRCUITS;

FADING CHANNEL;

ORTHOGONAL FREQUENCY DIVISION MULTIPLEXING;

EID: 0038422921     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)

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3. R.V. Paiement, "Evaluation of Single Carrier and Multicarrier Modulation Techniques for Digital ATV Terrestrial Broadcasting," CRC Report, No. CRC-RP-004, Ottawa, Canada, Dec. 1994.
4. B.M. Bass, "A Low-Power High-Performance, 1024-Point FFT Processor," IEEE J. of Solid-State Circuit, vol. 34 no. 3, pp. 380-387, Mar 1999.
5. W. Li and L. Wanhammar, "A Pipeline FFT Processor," IEEE Workshop on Signal Processing Systems, pp. 654-662,1999.
6. nd IEEE Asia Pacific Conference on ASICs, (Cheju, Korea), pp. 111-114, 2000.
7. E. Bidet, D. Castelain, et al., "A fast single-chip implementation of 8192 complex point FFT," IEEE Journal of Solid-State Circuits, vol. 30, Issue 3, pp. 300-305, March 1995.
8. C.C.W. Hui, T.J. Ding, et al., "A New FFT Architecture and Chip Design for Motion Compensation Based on Pjase Correlation," Preceeding of International Conference, Application Specific Systems Architectures and Processors, pp. 83-02, 1996.
9. J. Lihong, Y. Gao, et al. "A New VLSI-Oriented FFT Algorithm and Implementation," IEEE ASIC Conference, pp. 337-341, 1998.