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Volumn 2, Issue , 2003, Pages

Embedded reconfigurable array targeting motion estimation applications

Author keywords

Array; Domain specific; Embedded; FPGA; Motion estimation; Programmable; Reconfigurable

Indexed keywords

ALGORITHMS; FIELD PROGRAMMABLE GATE ARRAYS; IMAGE COMPRESSION; MULTIMEDIA SYSTEMS; THROUGHPUT;

EID: 0038421882     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (14)

References (17)
  • 2
    • 0003487143 scopus 로고    scopus 로고
    • ITU, DRAFT H.263, Video Coding for low bit rate communication, Jan.
    • ITU, ITU Recommendation H.263, DRAFT H.263, Video Coding for low bit rate communication, Jan. 1998
    • (1998) ITU Recommendation H.263
  • 11
    • 0024753317 scopus 로고
    • Array architectures for block matching algorithms
    • Oct.
    • Komarek, T., Pirsch, P, Array architectures for block matching algorithms. Circuits and Systems, IEEE Transactions on, Volume: 36 Issue: 10, Oct. 1989, Page(s): 1301-1308
    • (1989) Circuits and Systems, IEEE Transactions on , vol.36 , Issue.10 , pp. 1301-1308
    • Komarek, T.1    Pirsch, P.2
  • 12
    • 0024754362 scopus 로고
    • Parameterizable VLSI architectures for the full-search block-matching algorithm
    • Oct.
    • De Vos, L.; Stegherr, M., Parameterizable VLSI architectures for the full-search block-matching algorithm, IEEE Transactions on Circuits and Systems, Vol.36 Issue: 10, Oct. 1989
    • (1989) IEEE Transactions on Circuits and Systems , vol.36 , Issue.10
    • De Vos, L.1    Stegherr, M.2
  • 13
    • 0024755322 scopus 로고
    • A family of VLSI designs for the motion compensation block-matching algorithm
    • Oct.
    • Yang, K.-M.; Sun, M.-T.; Wu, L., A family of VLSI designs for the motion compensation block-matching algorithm, IEEE Transactions on Circuits and Systems, Vol. 36 Issue: 10, Oct. 1989
    • (1989) IEEE Transactions on Circuits and Systems , vol.36 , Issue.10
    • Yang, K.-M.1    Sun, M.-T.2    Wu, L.3
  • 14
    • 0026124456 scopus 로고
    • Flexibility of interconnection structures for field-programmable gate arrays
    • Rose J., Brown S., Flexibility of interconnection structures for field-programmable gate arrays, Solid-State Circuits, IEEE Journal of, Vol.26, Iss.3, 1990, Pages: 277-282
    • (1990) Solid-State Circuits, IEEE Journal of , vol.26 , Issue.3 , pp. 277-282
    • Rose, J.1    Brown, S.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.