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Volumn 50, Issue 3, 2003, Pages 764-768

Crosstalk suppression in mixed-mode ICs by the π technology and the future with an SOC integration platform: Particle-beam stand (PBS)

Author keywords

Coupling; Deep level defect; Isolation; Mixed mode; System on a chip (SOC)

Indexed keywords

CHARGE CARRIERS; CROSSTALK; ELECTRIC VARIABLES MEASUREMENT; INTEGRATED CIRCUIT MANUFACTURE; MICROPROCESSOR CHIPS; PROTON BEAMS; PROTON IRRADIATION; SILICON WAFERS; SUBSTRATES;

EID: 0038037732     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2003.810476     Document Type: Article
Times cited : (9)

References (8)
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    • Proc. IEEE Int. SOI Conf., 1992 , pp. 170-171
    • Rahim, I.1    Lim, I.2    Foerstner, J.3    Hwang, B.Y.4
  • 3
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    • D. K. Su, M. J. Loinaz, S. Masui, and B. A. Wooley, "Experimental results and modeling techniques for substrate noise in mixed-signal integrated circuits," IEEE J. Solid State Circuits, vol. 28, p. 420, 1993.
    • (1993) IEEE J. Solid State Circuits , vol.28 , pp. 420
    • Su, D.K.1    Loinaz, M.J.2    Masui, S.3    Wooley, B.A.4
  • 4
    • 0027668154 scopus 로고
    • Folded source-coupled logic vs. CMOS static logic for low-noise mixed-signal IC's
    • D. J. Allstot, S. Chee, S. Kiaei, and M. Shrivastawa, "Folded source-coupled logic vs. CMOS static logic for low-noise mixed-signal IC's," IEEE Trans. Circuits Syst. I, vol. 40, p. 553, 1993.
    • (1993) IEEE Trans. Circuits Syst. I , vol.40 , pp. 553
    • Allstot, D.J.1    Chee, S.2    Kiaei, S.3    Shrivastawa, M.4
  • 5
    • 0028517306 scopus 로고
    • A simple approach to modeling cross-talk in integrated circuits
    • Oct.
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    • Joardar, K.1
  • 6
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    • Method of creating local semi-insulating regions on silicon wafers for device isolation and realization of high-Q inductors
    • Dec.
    • C. P. Liao et al., "Method of creating local semi-insulating regions on silicon wafers for device isolation and realization of high-Q inductors," IEEE Electron Device Lett., vol. 19, p. 461, Dec. 1998.
    • (1998) IEEE Electron Device Lett. , vol.19 , pp. 461
    • Liao, C.P.1
  • 7
    • 0035340555 scopus 로고    scopus 로고
    • Isolation on Si wafer by MeV proton bombardment for RF integrated circuits
    • May
    • L. S. Lee et al., "Isolation on Si wafer by MeV proton bombardment for RF integrated circuits," IEEE Trans. Electron Devices, vol. 48, pp. 928-934, May 2001.
    • (2001) IEEE Trans. Electron Devices , vol.48 , pp. 928-934
    • Lee, L.S.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.