Integrated chaos generators

Proceedings of the IEEE

Volumn 90, Issue 5, 2002, Pages 747-766

  Delgado Restituto, Manuel ^a,b,c   Rodríguez Vázquez, Angel ^a,b,d  

^a IEEE   (Spain)

^b INSTITUTO DE MICROELECTRÓNICA DE SEVILLA   (Spain)

^c CSIC   (Spain)

^d UNIVERSITY OF SEVILLE   (Spain)

Author keywords

Analog CMOS; Chaos; Design methodology; Design system; Nonlinear circuit design

Indexed keywords

CMOS INTEGRATED CIRCUITS; INTEGRATED CIRCUIT LAYOUT; MATHEMATICAL MODELS; SILICON;

ANALOG CMOS; DESIGN METHODOLOGY; DESIGN SYSTEM; NONLINEAR CIRCUIT DESIGN;

CHAOS THEORY;

EID: 0037897250     PISSN: 00189219     EISSN: None     Source Type: Journal    
DOI: 10.1109/JPROC.2002.1015005     Document Type: Article

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