A 0.25-μm 20-dBm 2.4-GHz CMOS power amplifier with an integrated diode linearizer

IEEE Microwave and Wireless Components Letters

Volumn 13, Issue 2, 2003, Pages 45-47

  Yen, Cheng Chi ^a   Chuang, Huey Ru ^a  

^a NATIONAL CHENG KUNG UNIVERSITY   (Taiwan)

Author keywords

0.25 mm; 2.4 GHz; CMOS; Diode linearizer; Power amplifier (PA); WLAN

Indexed keywords

AMPLIFICATION; CMOS INTEGRATED CIRCUITS; EFFICIENCY; GAIN MEASUREMENT; INTEGRATED CIRCUIT MANUFACTURE; LINEARIZATION; LOCAL AREA NETWORKS; MOSFET DEVICES; PRINTED CIRCUIT BOARDS; PRINTED CIRCUIT TESTING; WIRELESS TELECOMMUNICATION SYSTEMS;

DIODE LINEARIZER; GAIN COMPRESSION; PLASMA REACTOR; POWER ADDED EFFICIENCY; WIRELESS LOCAL AREA NETWORK;

POWER AMPLIFIERS;

EID: 0037331392     PISSN: 15311309     EISSN: None     Source Type: Journal    
DOI: 10.1109/LMWC.2003.808722     Document Type: Letter

References (3)

1. T. Yoshimasu, M. Akagi, N. Tanba, and S. Hara, "An HBT MMIC power amplifier with an integrated diode linearizer for low-voltage portable phone applications," IEEE J. Solid-State Circuits, vol. 33, pp. 1290-1296, Sept. 1998.
2. ____, "A low distortion and high efficiency HBT MMIC power amplifier with a novel linearization technique for π/4 DQPSK modulation," in IEEE GaAs IC Symp. Tech. Dig., 1997, pp. 45-48.
3. C. Wang, L.-E. Larson, and P.-M. Asbeck, "A nonlinear capacitance cancellation technique and its application to a CMOS class AB power amplifier," in IEEE RFIC Symp. Dig., 2001, pp. 39-42.