Modelling the effect of temperature on product reliability

Annual IEEE Semiconductor Thermal Measurement and Management Symposium

Volumn , Issue , 2003, Pages 324-331

  Bailey, Chris ^a  

^a UNIVERSITY OF GREENWICH   (United Kingdom)

Author keywords

Flip chip; Multiphysics modelling; Optical packages; Optimisation; Reliability; Thermo mechanical modelling

Indexed keywords

COMPUTER SIMULATION; ELECTRONICS PACKAGING; FLIP CHIP DEVICES; OPTIMIZATION; PRODUCT DEVELOPMENT; RELIABILITY; SEMICONDUCTOR DEVICE MANUFACTURE; STATISTICAL METHODS; THERMAL EFFECTS; ASSEMBLY; CHIP SCALE PACKAGES; COST BENEFIT ANALYSIS; COSTS; FAILURE (MECHANICAL); MANUFACTURE; PHYSICS; SUPPLY CHAINS; TEMPERATURE; THERMAL VARIABLES MEASUREMENT; VIRTUAL PROTOTYPING;

MULTIPHYSICS MODELLING; OPTICAL PACKAGES; PRODUCT RELIABILITY; THERMOMECHANICAL MODELING; VIRTUAL PROTOTYPING;

SEMICONDUCTOR DEVICE MODELS; FAILURE ANALYSIS;

APPROPRIATE TECHNOLOGIES; EFFECT OF TEMPERATURE; ELECTRONIC SYSTEMS; MANUFACTURING PROCESS; PRODUCT RELIABILITY; RELIABILITY PREDICTION; TRADITIONAL APPROACHES; VIRTUAL PROTOTYPING TECHNOLOGIES;

EID: 0037272260     PISSN: 10652221     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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