CMOS current/voltage mode winner-take-all circuit with spatial filtering

ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings

Volumn 3, Issue , 2001, Pages 636-639

  Fish, Alexander ^a   Yadid Pecht, Orly ^a  

^a BEN GURION UNIVERSITY OF THE NEGEV   (Israel)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS ACTIVE PIXEL SENSORS; IMAGE INTENSITIES; IMAGE PROCESSING APPLICATIONS; INTENSITY LEVELS; REMOVAL PROCESS; SPATIAL FILTERINGS; SUB-MICRON CMOS TECHNOLOGY; WINNER-TAKE-ALL CIRCUITS;

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRIC NETWORK ANALYSIS; IMAGE PROCESSING; SIGNAL FILTERING AND PREDICTION;

IMAGE SEGMENTATION; CMOS INTEGRATED CIRCUITS;

SPATIAL FILTERING; WINNER TAKE ALL CIRCUIT (WTA);

EID: 0035011628     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2001.921391     Document Type: Conference Paper

References (12)

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